Home / CERN Logic / ATXMEGA128A1U-AU (CERN library)ATXMEGA128A1U-AU (CERN library)
8/16-bit AVR XMEGA A1U Microcontroller, 1.6-3.6V, 128KB + 8KB Flash, 2KB EEPROM, 8KB SRAM, 100-pin TQFP, Industrial Grade (-40°C to 85°C), Pb-Free. Imported from the CERN KiCad library (CERN-OHL-P-2.0, (c) CERN); passed PartReel quality gates. Verified-2D part: upstream ships no 3D models.
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Verified-2D part (no 3D model upstream)
PA0/SYNC/ADC0/AC0/AREF 95 PA1/SYNC/ADC1/AC1 96 PA2/SYNC/ASYNC/ADC2/AC2/DAC0 97 PA3/SYNC/ADC3/AC3/DAC1 98 PA4/SYNC/ADC4/AC4 99 PA5/SYNC/ADC5/AC5 100 PA6/SYNC/ADC6/AC6/AC1OUT 1 PA7/SYNC/ADC7/AC7/AC0OUT 2 PB0/SYNC/ADC0/AC0/AREF 5 PB1/SYNC/ADC1/AC1 6 PB2/SYNC/ASYNC/ADC2/AC2/DAC0 7 PB3/SYNC/ADC3/AC3/DAC1 8 PB4/SYNC/ADC4/AC4/TMS 9 PB5/SYNC/ADC5/AC5/TDI 10 PB6/SYNC/ADC6/AC6/AC1OUT/TCK 11 PB7/SYNC/ADC7/AC7/AC0OUT/TDO 12 PC0/SYNC/OC0A/~{OC0ALS}/SDA 15 PC1/SYNC/OC0B/OC0AHS/XCK0/SCL 16 PC2/SYNC/ASYNC/OC0C/~{OC0BLS}/RXD0 17 PC3/SYNC/OC0D/OC0BHS/TXD0 18 PC4/SYNC/~{OC0CLS}/OC1A/~{SS} 19 PC5/SYNC/OC0CHS/OC1B/XCK1/MOSI 20 PC6/SYNC/~{OC0DLS}/RXD1/MISO/CLKRTC 21 PC7/SYNC/OC0DHS/TXD1/SCK/CLKPER/EVOUT 22 PD0/SYNC/OC0A/SDA 25 PD1/SYNC/OC0B/XCK0/SCL 26 PD2/SYNC/ASYNC/OC0C/RXD0 27 PD3/SYNC/OC0D/TXD0 28 PD4/SYNC/OC1A/~{SS} 29 PD5/SYNC/OC1B/XCK1/MOSI 30 PD6/SYNC/D-/RXD1/MISO 31 PD7/SYNC/D+/TXD1/SCK/CLKPER/EVOUT 32 PE0/SYNC/OC0A/~{OC0ALS}/SDA 35 PE1/SYNC/OC0B/OC0AHS/XCK0/SCL 36 PE2/SYNC/ASYNC/OC0C/~{OC0BLS}/RXD0 37 PE3/SYNC/OC0D/OC0BHS/TXD0 38 PE4/SYNC/~{OC0CLS}/OC1A/~{SS} 39 PE5/SYNC/OC0CHS/OC1B/XCK1/MOSI 40 PE6/SYNC/~{OC0DLS}/RXD1/MISO 41 PE7/SYNC/OC0DHS/TXD1/SCK/CLKPER/EVOUT 42 ~{RESET}/PDI_CLOCK 90 PDI/PDI_DATA 89 PR1/SYNC/XTAL1 92 PR0/SYNC/XTAL2 91 PQ3/SYNC 88 PQ2/SYNC/ASYNC 87 PQ1/SYNC/TOSC2 86 PQ0/SYNC/TOSC1 85 PK7/SYNC/A7/A15/A23 82 PK6/SYNC/A6/A14/A22 81 PK5/SYNC/A5/A13/A21 80 PK4/SYNC/A4/A12/A20 79 PK3/SYNC/A3/A11/A19 78 PK2/SYNC/ASYNC/A2/A10/A18 77 PK1/SYNC/A1/A9/A17 76 PK0/SYNC/A0/A8/A16 75 PJ7/SYNC/A11/D7/A7/A15 72 PJ6/SYNC/A10/D6/A6/A14 71 PJ5/SYNC/A9/D5/A5/A13 70 PJ4/SYNC/A8/D4/A4/A12 69 PJ3/SYNC//D3/A3/A11 68 PJ2/SYNC/ASYNC//D2/A2/A10 67 PJ1/SYNC//D1/A1/A9 66 PJ0/SYNC//D0/A0/A8 65 PH7/SYNC/CLK/~{CS3}/A19 62 PH6/SYNC/CKE/~{CS2}/A18 61 PH5/SYNC/BA1/~{CS1}/A17 60 PH4/SYNC/BA0/~{CS0}/A16 59 PH3/SYNC/~{DQM}/~{ALE2} 58 PH2/SYNC/ASYNC/~{RAS}/~{ALE1} 57 PH1/SYNC/~{CAS}/~{RE} 56 PH0/SYNC/~{WE} 55 PF7/SYNC/TXD1/SCK 52 PF6/SYNC/RXD1/MISO 51 PF5/SYNC/OC1B/XCK1/MOSI 50 PF4/SYNC/OC1A/~{SS} 49 PF3/SYNC/OC0D/TXD0 48 PF2/SYNC/ASYNC/OC0C/RXD0 47 PF1/SYNC/OC0B/XCK0/SCL 46 PF0/SYNC/OC0A/SDA 45 A VCC 14 VCC 24 VCC 34 VCC 44 VCC 74 VCC 64 VCC 54 VCC 83 AVCC 4 AVCC 94 GND 84 GND 93 GND 53 GND 63 GND 73 GND 43 GND 33 GND 23 GND 13 GND 3 B
Specifications
Manufacturer ATMEL Family CERN Logic MPN pattern ATXMEGA128A1U-AU Pins 100 Mounting SMD
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Datasheet
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Source library file (provenance)
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Affiliate link · Part license: CERN-OHL-P-2.0
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