Home / CERN Logic / GN4124 (CERN library)GN4124 (CERN library)
x4 Lane PCI Express to Local Bridge. Imported from the CERN KiCad library (CERN-OHL-P-2.0, (c) CERN); passed PartReel quality gates. Verified-2D part: upstream ships no 3D models.
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Verified-2D part (no 3D model upstream)
L2P_DATA15 B16 L2P_DATA14 C16 L2P_DATA13 E16 L2P_DATA12 F16 L2P_DATA11 J16 L2P_DATA10 K16 L2P_DATA9 L16 L2P_DATA8 N16 L2P_DATA7 C15 L2P_DATA6 D15 L2P_DATA5 E15 L2P_DATA4 F15 L2P_DATA3 J15 L2P_DATA2 L15 L2P_DATA1 M15 L2P_DATA0 N15 L2P_DFRAME H14 L2P_VALID H16 L2P_EDB G14 L2P_CLKp G16 L2P_CLKn G15 L_WR_RDY0 K14 L_WR_RDY1 J14 P_RD_D_RDY0 M14 P_RD_D_RDY1 L14 L2P_RDY F14 TX_ERROR N14 A P2L_DATA15 P5 P2L_DATA14 R4 P2L_DATA13 R5 P2L_DATA12 R6 P2L_DATA11 R9 P2L_DATA10 R11 P2L_DATA9 R12 P2L_DATA8 R13 P2L_DATA7 T5 P2L_DATA6 T6 P2L_DATA5 T7 P2L_DATA4 T8 P2L_DATA3 T9 P2L_DATA2 T10 P2L_DATA1 T11 P2L_DATA0 T13 P2L_DFRAME R7 P2L_VALID P7 P2L_CLKp P8 P2L_CLKn R8 P_WR_REQ1 P10 P_WR_REQ0 N9 P_WR_RDY0 N12 P_WR_RDY1 N11 VC_RDY0 P12 VC_RDY1 P11 P2L_RDY P9 RX_ERROR N6 B LCLK P14 LCLKn R16 LB_REF_CLK_MI D12 LB_REF_CLK_MO C13 LCLK_MODE3 K6 LCLK_MODE2 L4 LCLK_MODE1 M4 LCLK_MODE0 M5 C PETn0 D1 PETn1 E2 PETn2 M2 PETn3 N1 PETp0 C1 PETp1 F2 PETp2 L2 PETp3 P1 PERn0 A2 PERn1 H1 PERn2 J1 PERn3 T2 PERp0 B2 PERp1 G1 PERp2 K1 PERp3 R2 PECLKINn H5 PECLKINp G5 D TDI A9 TMS F10 TCK F11 TRST B12 TDO A14 SCAN_EN D6 TEST_EN E6 E ~{RSTIN} B8 ~{RSTOUT33} C9 ~{RSTOUT18} P16 F SPRI_CLK A8 SPRI_DATAOUT B10 SPRI_CONFIG C11 SPRI_DONE A12 SPRI_XI_SWAP B13 SPRI_STATUS B14 G SCLK B11 SDATA C12 EEPROM_EN E5 H GPIO15 A6 GPIO14 B7 GPIO13 B6 GPIO12 C7 GPIO11 F7 GPIO10 C8 GPIO9 A7 GPIO8 B9 GPIO7 A10 GPIO6 A11 GPIO5 E11 GPIO4 A13 GPIO3 D9 GPIO2 C10 GPIO1 D11 GPIO0 E12 I DBG0 A4 DBG1 C6 DBG2 B4 DBG3 D7 DBG4 E7 DBG5 C5 DBG6 B5 DBG7 A5 PLL_TEST_OUT A15 J VDDAUX G3 VDD_PCIE B1 VDD_PCIE C3 VDD_PCIE D3 VDD_PCIE N3 VDD_PCIE P3 VDD_PCIE R1 VSS_PCIE A1 VSS_PCIE A3 VSS_PCIE C2 VSS_PCIE D2 VSS_PCIE E3 VSS_PCIE F3 VSS_PCIE G2 VSS_PCIE H2 VSS_PCIE J2 VSS_PCIE K2 VSS_PCIE L3 VSS_PCIE M3 VSS_PCIE N2 VSS_PCIE P2 VSS_PCIE T1 VSS_PCIE T3 PCIE_VDDA H3 PCIE_VDDA J3 VSS A16 VSS B15 VSS C4 VSS C14 VSS D4 VSS E4 VSS G4 VSS G6 VSS G7 VSS G8 VSS G9 VSS G10 VSS G11 VSS H6 VSS H7 VSS H8 VSS H9 VSS H10 VSS H13 VSS J4 VSS J5 VSS J7 VSS J8 VSS J9 VSS J10 VSS K3 VSS K7 VSS K8 VSS K9 VSS K10 VSS K11 VSS K12 VSS L1 VSS L11 VSS L12 VSS M7 VSS M11 VSS M12 VSS N5 VSS P4 VSS R3 VSS R15 VSS T16 VCCO33 E8 VCCO33 E9 VCCO33 F8 VCCO33 F9 VCCO18 H11 VCCO18 H12 VCCO18 J11 VCCO18 J12 VCCO18 L8 VCCO18 L9 VCCO18 M8 VCCO18 M9 VDDC D5 VDDC D8 VDDC D13 VDDC D16 VDDC E10 VDDC E13 VDDC F6 VDDC F12 VDDC F13 VDDC G12 VDDC H4 VDDC H15 VDDC J13 VDDC K15 VDDC L5 VDDC L6 VDDC L10 VDDC L13 VDDC M6 VDDC M10 VDDC M16 VDDC N8 VDDC N10 VDDC P6 VDDC P13 VDDC P15 VDDC T4 VDDC T12 VDDP E1 VDDP K4 VDDW F5 VDDW K5 VREF R10 VTT_AB F1 VTT_CD M1 PLL_AVDD T14 PLL_AVSS N13 NC B3 NC D10 NC D14 NC E14 NC F4 NC G13 NC J6 NC K13 NC L7 NC M13 NC N4 NC N7 NC R14 NC T15 K
Specifications
Manufacturer GENNUM Family CERN Logic MPN pattern GN4124 Pins 256 Mounting SMD
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Datasheet
Find datasheet (GENNUM GN4124) →
Source library file (provenance)
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Affiliate link · Part license: CERN-OHL-P-2.0
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Machine-readable data for this part: /api/v1/parts/cern_gn4124.json (absolute download URLs).
MCP: https://mcp.partreel.com/mcp → get_part("cern_gn4124"). See /llms.txt · agent guide