Home / CERN Logic / LPC1776FET180,551 (CERN library)LPC1776FET180,551 (CERN library)
Cortex-M3, 32-bit ARM MCU, 256kB Flash, 80kB SRAM, Ethernet, USB 2.0 Device/Host/OTG, CAN, 12-Bit ADC. Imported from the CERN KiCad library (CERN-OHL-P-2.0, (c) CERN); passed PartReel quality gates. Verified-2D part: upstream ships no 3D models.
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Footprint
Verified-2D part (no 3D model upstream)
P0[0]/CAN_RD1/U3_TXD/I2C1_SDA/U0_TXD M10 P0[1]/CAN_TD1/U3_RXD/I2C1_SCL/U0_RXD N11 P0[2]/U0_TXD/U3_TXD D5 P0[3]/U0_RXD/U3_RXD A3 P0[4]/I2S_RX_SCK/CAN_RD2/T2_CAP0 A11 P0[5]/I2S_RX_WS/CAN_TD2/T2_CAP1 B11 P0[6]/I2S_RX_SDA/SSP1_SSEL/T2_MAT0/U1_RTS D11 P0[7]/I2S_TX_SCK/SSP1_SCK/T2_MAT1/RTC_EV0 B12 P0[8]/I2S_TX_WS/SSP1_MISO/T2_MAT2/RTC_EV1 C12 P0[9]/I2S_TX_SDA/SSP1_MOSI/T2_MAT3/RTC_EV2 A13 P0[10]/U2_TXD/I2C2_SDA/T3_MAT0 L10 P0[11]/U2_RXD/I2C2_SCL/T3_MAT1 P12 P0[12]/~{USB_PPWR2/SSP1}_MISO/ADC0_IN[6] J4 P0[13]/USB_UP_LED2/SSP1_MOSI/ADC0_IN[7] J5 P0[14]/~{USB_HSTEN2}/SSP1_SSEL/USB_CONNECT2 M5 P0[15]/U1_TXD/SSP0_SCK H13 P0[16]/U1_RXD/SSP0_SSEL H14 P0[17]/U1_CTS/SSP0_MISO J12 P0[18]/U1_DCD/SSP0_MOSI J13 P0[19]/U1_DSR/SD_CLK/I2C1_SDA J10 P0[20]/U1_DTR/SD_CMD/I2C1_SCL K14 P0[21]/U1_RI/SD_PWR/U4_OE/CAN_RD1/U4_SCLK K11 P0[22]/U1_RTS/SD_DAT[0]/U4_TXD/CAN_TD1 L14 P0[23]/ADC0_IN[0]/I2S_RX_SCK/T3_CAP0 F5 P0[24]/ADC0_IN[1]/I2S_RX_WS/T3_CAP1 E1 P0[25]/ADC0_IN[2]/I2S_RX_SDA/U3_TXD E4 P0[26]/ADC0_IN[3]/DAC_OUT/U3_RXD D1 P0[27]/I2C0_SDA/USB_SDA1 L3 P0[28]/I2C0_SCL/USB_SCL1 M1 P0[29]/USB_D+1/~{EINT0} K5 P0[30]/USB_D-1/~{EINT1} N4 P0[31]/USB_D+2 N1 P1[0]/ENET_TXD0/T3_CAP1/SSP2_SCK B5 P1[1]/ENET_TXD1/T3_MAT3/SSP2_MOSI A5 P1[2]/ENET_TXD2/SD_CLK/PWM0[1] B7 P1[3]/ENET_TXD3/SD_CMD/PWM0[2] A9 P1[4]/ENET_TX_EN/T3_MAT2/SSP2_MISO C6 P1[5]/ENET_TX_ER/SD_PWR/PWM0[3] B13 P1[6]/ENET_TX_CLK/SD_DAT[0]/PWM0[4] B10 P1[7]/ENET_COL/SD_DAT[1]/PWM0[5] C13 P1[8]/ENET_CRS_(ENET_CRS_DV)/T3_MAT1/SSP2_SSEL B6 P1[9]/ENET_RXD0/T3_MAT0 D7 P1[10]/ENET_RXD1/T3_CAP0 A7 P1[11]/ENET_RXD2/SD_DAT[2]/PWM0[6] A12 P1[12]/ENET_RXD3/SD_DAT[3]/PWM0_CAP0 A14 P1[13]/ENET_RX_DV D14 P1[14]/ENET_RX_ER/T2_CAP0 D8 P1[15]/ENET_RX_CLK_(ENET_REF_CLK)/I2C2_SDA A8 P1[16]/ENET_MDC/I2S_TX_MCLK B8 P1[17]/ENET_MDIO/I2S_RX_MCLK C9 P1[18]/USB_UP_LED1/PWM1[1]/T1_CAP0/SSP1_MISO L5 P1[19]/~{USB_TX_E1}/~{USB_PPWR1}/T1_CAP1/MC_0A/SSP1_SCK/U2_OE P5 P1[20]/USB_TX_DP1/PWM1[2]/QEI_PHA/MC_FB0/SSP0_SCK K6 P1[21]/USB_TX_DM1/PWM1[3]/SSP0_SSEL/~{MC_ABORT} N6 P1[22]/USB_RCV1/USB_PWRD1/T1_MAT0/MC_0B/SSP1_MOSI M6 P1[23]/USB_RX_DP1/PWM1[4]/QEI_PHB/MC_FB1/SSP0_MISO N7 P1[24]/USB_RX_DM1/PWM1[5]/QEI_IDX/MC_FB2/SSP0_MOSI P7 P1[25]/~{USB_LS1}/~{USB_HSTEN1}/T1_MAT1/MC_1A/CLKOUT L7 P1[26]/~{USB_SSPND1}/PWM1[6]/T0_CAP0/MC_1B/SSP1_SSEL P8 P1[27]/~{USB_INT1}/~{USB_OVRCR1}/T0_CAP1/CLKOUT M9 P1[28]/USB_SCL1/PWM1_CAP0/T0_MAT0/MC_2A/SSP0_SSEL P10 P1[29]/USB_SDA1/PWM1_CAP1/T0_MAT1/MC_2B/U4_TXD N10 P1[30]/USB_PWRD2/USB_VBUS/ADC0_IN[4]/I2C0_SDA/U3_OE K3 P1[31]/~{USB_OVRCR2}/SSP1_SCK/ADC0_IN[5]/I2C0_SCL K2 A P2[0]/PWM1[1]/U1_TXD D12 P2[1]/PWM1[2]/U1_RXD C14 P2[2]/PWM1[3]/U1_CTS/T2_MAT3/TRACEDATA[3] E11 P2[3]/PWM1[4]/U1_DCD/T2_MAT2/TRACEDATA[2] E13 P2[4]/PWM1[5]/U1_DSR/T2_MAT1/TRACEDATA[1] E14 P2[5]/PWM1[6]/U1_DTR/T2_MAT0/TRACEDATA[0] F12 P2[6]/PWM1_CAP0/U1_RI/T2_CAP0/U2_OE/TRACECLK F13 P2[7]/CAN_RD2/U1_RTS G11 P2[8]/CAN_TD2/U2_TXD/U1_CTS/ENET_MDC G14 P2[9]/USB_CONNECT1/U2_RXD/U4_RXD/ENET_MDIO H11 P2[10]/~{EINT0}/NMI M13 P2[11]/~{EINT1}/SD_DAT[1]/I2S_TX_SCK M12 P2[12]/~{EINT2}/SD_DAT[2]/I2S_TX_WS N14 P2[13]/~{EINT3}/SD_DAT[3]/I2S_TX_SDA M11 P2[16]/~{EMC_CAS} P9 P2[17]/~{EMC_RAS} P11 P2[18]/EMC_CLK[0] P3 P2[19]/EMC_CLK[1] N5 P2[20]/~{EMC_DYCS0} P6 P2[21]/~{EMC_DYCS1} N8 P2[24]/EMC_CKE0 P1 P2[25]/EMC_CKE1 P2 P2[28]/EMC_DQM0 M2 P2[29]/EMC_DQM1 L1 P3[0]/EMC_D[0] D6 P3[1]/EMC_D[1] E6 P3[2]/EMC_D[2] A2 P3[3]/EMC_D[3] G5 P3[4]/EMC_D[4] D3 P3[5]/EMC_D[5] E3 P3[6]/EMC_D[6] F4 P3[7]/EMC_D[7] G3 P3[8]/EMC_D[8] A6 P3[9]/EMC_D[9] A4 P3[10]/EMC_D[10] B3 P3[11]/EMC_D[11] B2 P3[12]/EMC_D[12] A1 P3[13]/EMC_D[13] C1 P3[14]/EMC_D[14] F1 P3[15]/EMC_D[15] G4 P3[23]/EMC_D[23]/PWM1_CAP0/T0_CAP0 M4 P3[24]/EMC_D[24]/PWM1[1]/T0_CAP1 N3 P3[25]/EMC_D[25]/PWM1[2]/T0_MAT0 M3 P3[26]/EMC_D[26]/PWM1[3]/T0_MAT1/STCLK K7 B P4[0]/EMC_A[0] L6 P4[1]/EMC_A[1] M7 P4[2]/EMC_A[2] M8 P4[3]/EMC_A[3] K9 P4[4]/EMC_A[4] P13 P4[5]/EMC_A[5] H10 P4[6]/EMC_A[6] K10 P4[7]/EMC_A[7] K12 P4[8]/EMC_A[8] J11 P4[9]/EMC_A[9] H12 P4[10]/EMC_A[10] G12 P4[11]/EMC_A[11] F11 P4[12]/EMC_A[12] F10 P4[13]/EMC_A[13] B14 P4[14]/EMC_A[14] E8 P4[15]/EMC_A[15] C10 P4[16]/EMC_A[16] N12 P4[17]/EMC_A[17] N13 P4[18]/EMC_A[18] P14 P4[19]/EMC_A[19] M14 P4[24]/~{EMC_OE} C8 P4[25]/~{EMC_WE} D9 P4[26]/~{EMC_BLS0} K13 P4[27]/~{EMC_BLS1} F14 P4[28]/~{EMC_BLS2}/U3_TXD/T2_MAT0 D10 P4[29]/~{EMC_BLS3}/U3_RXD/T2_MAT1/I2C2_SCL B9 P4[30]/~{EMC_CS0} C7 P4[31]/~{EMC_CS1} E7 P5[0]/EMC_A[24]/SSP2_MOSI/T2_MAT2 E5 P5[1]/EMC_A[25]/SSP2_MISO/T2_MAT3 H1 P5[2]/T3_MAT2/I2C0_SDA L12 P5[3]/U4_RXD/I2C0_SCL G10 P5[4]/U0_OE/T3_MAT3/U4_TXD C4 C USB_D-2 N2 ~{RESET} J1 ~{RSTOUT} H2 XTAL1 L2 XTAL2 K4 JTAG_TDI C3 JTAG_TDO(SWO) B1 JTAG_TCK(SWDCLK) D2 JTAG_TMS(SWDIO) C2 JTAG_~{TRST} D4 RTCX1 J2 RTCX2 J3 RTC_ALARM H5 D VBAT K1 VDDA F2 VDD(3V3) C5 VDD(3V3) E10 VDD(3V3) E12 VDD(3V3) E2 VDD(3V3) J14 VDD(3V3) K8 VDD(3V3) L11 VDD(3V3) L4 VDD(REG)(3V3) E9 VDD(REG)(3V3) G1 VDD(REG)(3V3) N9 VREFP G2 VSSA F3 VSS B4 VSS C11 VSS D13 VSS G13 VSS H4 VSS L13 VSS L9 VSS P4 VSSREG A10 VSSREG H3 VSSREG L8 E
Specifications
Manufacturer NXP SEMICONDUCTORS Family CERN Logic MPN pattern LPC1776FET180,551 Pins 180 Mounting SMD
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Datasheet
Find datasheet (NXP SEMICONDUCTORS LPC1776FET180,551) →
Source library file (provenance)
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Affiliate link · Part license: CERN-OHL-P-2.0
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Machine-readable data for this part: /api/v1/parts/cern_lpc1776fet180_551.json (absolute download URLs).
MCP: https://mcp.partreel.com/mcp → get_part("cern_lpc1776fet180_551"). See /llms.txt · agent guide