Home / CERN Logic / PCI9056-BA66BI-G (CERN library)PCI9056-BA66BI-G (CERN library)
32-Bit 66MHz PCI Bus Mastering I/O Accelerator for PowerQUICC and Generic 32-Bit, 66MHz Local Bus Design. Imported from the CERN KiCad library (CERN-OHL-P-2.0, (c) CERN); passed PartReel quality gates. Verified-2D part: upstream ships no 3D models.
Symbol
Footprint
Verified-2D part (no 3D model upstream)
LD0 C16 LD1 E14 LD2 D15 LD3 E15 LD4 F14 LD5 F15 LD6 E16 LD7 F16 LD8 G14 LD9 G15 LD10 G16 LD11 H13 LD12 H14 LD13 H15 LD14 H16 LD15 J16 LD16 J15 LD17 J14 LD18 K16 LD19 K15 LD20 K14 LD21 L16 LD22 M16 LD23 L15 LD24 L14 LD25 M15 LD26 N16 LD27 L13 LD28 M14 LD29 N15 LD30 M13 LD31 P16 LA2 N13 LA3 R15 LA4 R14 LA5 T15 LA6 P13 LA7 N12 LA8 R13 LA9 T14 LA10 P12 LA11 N11 LA12 T13 LA13 R12 LA14 T12 LA15 R11 LA16 P11 LA17 N10 LA18 T11 LA19 P10 LA20 R10 LA21 T10 LA22 P9 LA23 R9 LA24 T9 LA25 T8 LA26 R8 LA27 P8 LA28 N8 LA29 T7 LA30 R7 LA31 P7 DP0 D14 DP1 B16 DP2 C14 DP3 D13 ~{ADS} D12 ~{BLAST} A14 LW/~{R} P14 ~{READY} C15 ~{WAIT} C12 LHOLD A16 LHOLDA B14 ~{LINTi} C11 ~{LINTo} B11 ~{LRESET} D11 USERi/~{LLOCKi} A11 ~{LSERR} C13 ~{BIGEND} A9 BREQi A13 BREQo B13 ~{BTERM} E13 DMPAF/~{EOT} A12 USERo/~{LLOCKo} D10 ~{DREQ0} A10 ~{DREQ1} C10 ~{DACK0} C9 ~{DACK1} B10 EECS A8 EESK B8 EEDI/EEDO C8 ~{CCS} B9 MODE1 A15 MODE0 B15 ~{IDDQEN} B7 ~{HOSTEN} B12 ~{LBE0} N14 ~{LBE1} R16 ~{LBE2} P15 ~{LBE3} T16 LCLK D16 TCK B5 TMS A5 TDI D6 ~{TRST} C6 TDO A4 A C/~{BE0} N2 C/~{BE1} K2 C/~{BE2} G3 C/~{BE3} E4 ~{FRAME} G2 ~{IRDY} G1 ~{TRDY} H4 ~{STOP} H2 ~{DEVSEL} H3 IDSEL D3 ~{PERR} J2 ~{SERR} J3 ~{LOCK} H1 PAR K1 ~{REQ0}/~{GNT} D5 ~{REQ1} P4 ~{REQ2} R3 ~{REQ3} P5 ~{REQ4} T4 ~{REQ5} N6 ~{REQ6} R6 ~{GNT0}/~{REQ} A3 ~{GNT1} T2 ~{GNT2} T3 ~{GNT3} N5 ~{GNT4} R4 ~{GNT5} R5 ~{GNT6} T5 ~{INTA} B4 PCLK J1 ~{RST} C5 ~{PME} A6 ~{PMEREQ} C7 AD0 P3 AD1 R2 AD2 R1 AD3 T1 AD4 P2 AD5 M4 AD6 N3 AD7 P1 AD8 M3 AD9 L4 AD10 N1 AD11 M1 AD12 L3 AD13 L2 AD14 L1 AD15 K3 AD16 F1 AD17 F2 AD18 E1 AD19 F3 AD20 D1 AD21 E3 AD22 D2 AD23 C1 AD24 C2 AD25 A1 AD26 B1 AD27 B2 AD28 C3 AD29 D4 AD30 A2 AD31 C4 ~{BD_SEL} B6 CPCISW T6 ~{ENUM} P6 ~{LEDon} N7 B VRING M10 VRING M8 VRING M7 VRING K12 VRING K5 VRING J12 VRING H12 VRING H5 VRING G12 VRING G5 VRING E10 VRING E8 VRING E7 VIO N4 VIO M2 VIO E2 VIO B3 VCORE N9 VCORE K13 VCORE K4 VCORE F13 VCORE F4 VCORE D9 2.5VAUX D7 Card_VAUX A7 PRESENT_DET D8 VSS E5 VSS E6 VSS E9 VSS E11 VSS E12 VSS F5 VSS F6 VSS F7 VSS M12 VSS M11 VSS M9 VSS M6 VSS M5 VSS L12 VSS L11 VSS L10 VSS L9 VSS L8 VSS L7 VSS L6 VSS L5 VSS K11 VSS K10 VSS K9 VSS K8 VSS K7 VSS K6 VSS J13 VSS J11 VSS J10 VSS J9 VSS J8 VSS J7 VSS J6 VSS J5 VSS J4 VSS H11 VSS H10 VSS H9 VSS H8 VSS H7 VSS H6 VSS G13 VSS G11 VSS G10 VSS G9 VSS G8 VSS G7 VSS G6 VSS G4 VSS F12 VSS F11 VSS F10 VSS F9 VSS F8 C
Specifications
Manufacturer PLX TECHNOLOGY Family CERN Logic MPN pattern PCI9056-BA66BI-G Pins 256 Mounting SMD
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Datasheet
Find datasheet (PLX TECHNOLOGY PCI9056-BA66BI-G) →
Source library file (provenance)
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Affiliate link · Part license: CERN-OHL-P-2.0
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For AI agents
Machine-readable data for this part: /api/v1/parts/cern_pci9056_ba66bi_g_c.json (absolute download URLs).
MCP: https://mcp.partreel.com/mcp → get_part("cern_pci9056_ba66bi_g_c"). See /llms.txt · agent guide