Home / CERN Logic / XC6SLX9-2CPG196C (CERN library)XC6SLX9-2CPG196C (CERN library)
Spartan-6 LX 1.2V FPGA, 9152 Logic Cells, 106 User I/Os, 196-Ball Chip-Scale BGA (0.5mm Pitch), Speed Grade 2, Commercial Grade, Pb-Free. Imported from the CERN KiCad library (CERN-OHL-P-2.0, (c) CERN); passed PartReel quality gates. Verified-2D part: upstream ships no 3D models.
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Verified-2D part (no 3D model upstream)
IO_L1P_HSWAPEN_0 B2 IO_L1N_VREF_0 A2 IO_L2P_0 B3 IO_L2N_0 A3 IO_L3P_0 B4 IO_L3N_0 A4 IO_L4P_0 B5 IO_L4N_0 A5 IO_L34P_GCLK19_0 B6 IO_L34N_GCLK18_0 A6 IO_L35P_GCLK17_0 B7 IO_L35N_GCLK16_0 A7 IO_L36P_GCLK15_0 D8 IO_L36N_GCLK14_0 C8 IO_L37P_GCLK13_0 B8 IO_L37N_GCLK12_0 A8 IO_L62P_0 B9 IO_L62N_VREF_0 A9 IO_L63P_SCP7_0 B10 IO_L63N_SCP6_0 A10 IO_L64P_SCP5_0 B11 IO_L64N_SCP4_0 A11 IO_L65P_SCP3_0 B12 IO_L65N_SCP2_0 A12 IO_L66P_SCP1_0 D11 IO_L66N_SCP0_0 C11 A IO_L1P_1 C12 IO_L1N_VREF_1 C13 IO_L32P_1 D13 IO_L32N_1 D14 IO_L33P_1 E13 IO_L33N_1 E14 IO_L34P_1 F11 IO_L34N_1 F12 IO_L40P_GCLK11_1 G13 IO_L40N_GCLK10_1 G14 IO_L41P_GCLK9_IRDY1_1 F13 IO_L41N_GCLK8_1 F14 IO_L42P_GCLK7_1 H13 IO_L42N_GCLK6_TRDY1_1 H14 IO_L43P_GCLK5_1 H11 IO_L43N_GCLK4_1 H12 IO_L45P_1 J13 IO_L45N_1 J14 IO_L46P_1 J11 IO_L46N_1 J12 IO_L47P_1 K13 IO_L47N_1 K14 IO_L53P_1 L13 IO_L53N_VREF_1 L14 IO_L74P_AWAKE_1 M13 IO_L74N_DOUT_BUSY_1 M14 B IO_L1P_CCLK_2 N13 IO_L1N_M0_CMPMISO_2 P13 IO_L2P_CMPCLK_2 N12 IO_L2N_CMPMOSI_2 P12 IO_L3P_D0_DIN_MISO_MISO1_2 N11 IO_L3N_MOSI_CSI_B_MISO0_2 P11 IO_L12P_D1_MISO2_2 N10 IO_L12N_D2_MISO3_2 P10 IO_L13P_M1_2 N9 IO_L13N_D10_2 P9 IO_L14P_D11_2 L8 IO_L14N_D12_2 M8 IO_L30P_GCLK1_D13_2 N8 IO_L30N_GCLK0_USERCCLK_2 P8 IO_L31P_GCLK31_D14_2 N7 IO_L31N_GCLK30_D15_2 P7 IO_L48P_D7_2 N6 IO_L48N_RDWR_B_VREF_2 P6 IO_L49P_D3_2 N5 IO_L49N_D4_2 P5 IO_L62P_D5_2 L4 IO_L62N_D6_2 M4 IO_L63P_2 N4 IO_L63N_2 P4 IO_L64P_D8_2 N3 IO_L64N_D9_2 P3 IO_L65P_INIT_B_2 N2 IO_L65N_CSO_B_2 P2 C IO_L1P_3 M2 IO_L1N_VREF_3 M1 IO_L2P_3 L2 IO_L2N_3 L1 IO_L36P_3 K2 IO_L36N_3 K1 IO_L37P_3 J4 IO_L37N_3 J3 IO_L41P_GCLK27_3 J2 IO_L41N_GCLK26_3 J1 IO_L42P_GCLK25_TRDY2_3 G2 IO_L42N_GCLK24_3 G1 IO_L43P_GCLK23_3 H2 IO_L43N_GCLK22_IRDY2_3 H1 IO_L44P_GCLK21_3 F2 IO_L44N_GCLK20_3 F1 IO_L49P_3 F4 IO_L49N_3 F3 IO_L50P_3 E2 IO_L50N_3 E1 IO_L51P_3 D4 IO_L51N_3 D3 IO_L52P_3 D2 IO_L52N_3 D1 IO_L83P_3 C1 IO_L83N_VREF_3 B1 D DONE_2 N14 PROGRAM_B_2 N1 SUSPEND L12 TCK B13 TDI A13 TDO C14 TMS B14 CMPCS_B_2 M12 E VCCO_0 C10 VCCO_0 C4 VCCO_0 C5 VCCO_0 C9 VCCO_1 D12 VCCO_1 E12 VCCO_1 G11 VCCO_1 G12 VCCO_1 K11 VCCO_1 K12 VCCO_2 M10 VCCO_2 M5 VCCO_2 M6 VCCO_2 M9 VCCO_3 E3 VCCO_3 E4 VCCO_3 G3 VCCO_3 H3 VCCO_3 K3 VCCO_3 K4 VCCINT E10 VCCINT E5 VCCINT E6 VCCINT E9 VCCINT F10 VCCINT F5 VCCINT F6 VCCINT F9 VCCINT J5 VCCINT J6 VCCINT J9 VCCINT K10 VCCINT K5 VCCINT K6 VCCINT K9 VCCAUX D7 VCCAUX E7 VCCAUX G10 VCCAUX G9 VCCAUX H5 VCCAUX H6 VCCAUX K7 VCCAUX L7 F GND A1 GND A14 GND C2 GND C3 GND C6 GND C7 GND D10 GND D5 GND D6 GND D9 GND E11 GND E8 GND F7 GND F8 GND G4 GND G5 GND G6 GND G7 GND G8 GND H10 GND H4 GND H7 GND H8 GND H9 GND J10 GND J7 GND J8 GND K8 GND L10 GND L11 GND L3 GND L5 GND L6 GND L9 GND M11 GND M3 GND M7 GND P1 GND P14 G
Specifications
Manufacturer XILINX Family CERN Logic MPN pattern XC6SLX9-2CPG196C Pins 196 Mounting SMD
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Datasheet
Find datasheet (XILINX XC6SLX9-2CPG196C) →
Source library file (provenance)
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Affiliate link · Part license: CERN-OHL-P-2.0
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