Home / CERN Logic / XC7A50T-1FTG256C (CERN library)XC7A50T-1FTG256C (CERN library)
Artix-7 FPGA, 170 User I/Os, 0 GTP, 256-Ball Fine-Pitch Thin BGA (1.0mm Pitch), Speed Grade 1, Commercial Grade, Pb-Free. Imported from the CERN KiCad library (CERN-OHL-P-2.0, (c) CERN); passed PartReel quality gates. Verified-2D part: upstream ships no 3D models.
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Verified-2D part (no 3D model upstream)
IO_0_14 K12 IO_L1P_T0_D00_MOSI_14 J13 IO_L1N_T0_D01_DIN_14 J14 IO_L2P_T0_D02_14 K15 IO_L2N_T0_D03_14 K16 IO_L3P_T0_DQS_PUDC_B_14 L15 IO_L3N_T0_DQS_EMCCLK_14 M15 IO_L4P_T0_D04_14 L14 IO_L4N_T0_D05_14 M14 IO_L5P_T0_D06_14 K13 IO_L5N_T0_D07_14 L13 IO_L6P_T0_FCS_B_14 L12 IO_L6N_T0_D08_VREF_14 M12 IO_L7P_T1_D09_14 M16 IO_L7N_T1_D10_14 N16 IO_L8P_T1_D11_14 P15 IO_L8N_T1_D12_14 P16 IO_L9P_T1_DQS_14 R15 IO_L9N_T1_DQS_D13_14 R16 IO_L10P_T1_D14_14 T14 IO_L10N_T1_D15_14 T15 IO_L11P_T1_SRCC_14 N13 IO_L11N_T1_SRCC_14 P13 IO_L12P_T1_MRCC_14 N14 IO_L12N_T1_MRCC_14 P14 IO_L13P_T2_MRCC_14 N11 IO_L13N_T2_MRCC_14 N12 IO_L14P_T2_SRCC_14 P10 IO_L14N_T2_SRCC_14 P11 IO_L15P_T2_DQS_RDWR_B_14 R12 IO_L15N_T2_DQS_DOUT_CSO_B_14 T12 IO_L16P_T2_CSI_B_14 R13 IO_L16N_T2_A15_D31_14 T13 IO_L17P_T2_A14_D30_14 R10 IO_L17N_T2_A13_D29_14 R11 IO_L18P_T2_A12_D28_14 N9 IO_L18N_T2_A11_D27_14 P9 IO_L19P_T3_A10_D26_14 M6 IO_L19N_T3_A09_D25_VREF_14 N6 IO_L20P_T3_A08_D24_14 P8 IO_L20N_T3_A07_D23_14 R8 IO_L21P_T3_DQS_14 T7 IO_L21N_T3_DQS_A06_D22_14 T8 IO_L22P_T3_A05_D21_14 T9 IO_L22N_T3_A04_D20_14 T10 IO_L23P_T3_A03_D19_14 R5 IO_L23N_T3_A02_D18_14 T5 IO_L24P_T3_A01_D17_14 R6 IO_L24N_T3_A00_D16_14 R7 IO_25_14 P6 A IO_0_15 D10 IO_L1P_T0_AD0P_15 C8 IO_L1N_T0_AD0N_15 C9 IO_L2P_T0_AD8P_15 A8 IO_L2N_T0_AD8N_15 A9 IO_L3P_T0_DQS_AD1P_15 B9 IO_L3N_T0_DQS_AD1N_15 A10 IO_L4P_T0_15 B10 IO_L4N_T0_15 B11 IO_L5P_T0_AD9P_15 B12 IO_L5N_T0_AD9N_15 A12 IO_L6P_T0_15 D8 IO_L6N_T0_VREF_15 D9 IO_L7P_T1_AD2P_15 A13 IO_L7N_T1_AD2N_15 A14 IO_L8P_T1_AD10P_15 C14 IO_L8N_T1_AD10N_15 B14 IO_L9P_T1_DQS_AD3P_15 B15 IO_L9N_T1_DQS_AD3N_15 A15 IO_L10P_T1_AD11P_15 C16 IO_L10N_T1_AD11N_15 B16 IO_L11P_T1_SRCC_15 C11 IO_L11N_T1_SRCC_15 C12 IO_L12P_T1_MRCC_15 D13 IO_L12N_T1_MRCC_15 C13 IO_L13P_T2_MRCC_15 E12 IO_L13N_T2_MRCC_15 E13 IO_L14P_T2_SRCC_15 E11 IO_L14N_T2_SRCC_15 D11 IO_L15P_T2_DQS_15 D14 IO_L15N_T2_DQS_ADV_B_15 D15 IO_L16P_T2_A28_15 F12 IO_L16N_T2_A27_15 F13 IO_L17P_T2_A26_15 E16 IO_L17N_T2_A25_15 D16 IO_L18P_T2_A24_15 F15 IO_L18N_T2_A23_15 E15 IO_L19P_T3_A22_15 H11 IO_L19N_T3_A21_VREF_15 G12 IO_L20P_T3_A20_15 H12 IO_L20N_T3_A19_15 H13 IO_L21P_T3_DQS_15 G14 IO_L21N_T3_DQS_A18_15 F14 IO_L22P_T3_A17_15 H16 IO_L22N_T3_A16_15 G16 IO_L23P_T3_FOE_B_15 J15 IO_L23N_T3_FWE_B_15 J16 IO_L24P_T3_RS1_15 H14 IO_L24N_T3_RS0_15 G15 IO_25_15 G11 B IO_0_34 L5 IO_L1P_T0_34 L4 IO_L1N_T0_34 M4 IO_L2P_T0_34 M2 IO_L2N_T0_34 M1 IO_L3P_T0_DQS_34 N3 IO_L3N_T0_DQS_34 N2 IO_L4P_T0_34 N1 IO_L4N_T0_34 P1 IO_L5P_T0_34 P4 IO_L5N_T0_34 P3 IO_L6P_T0_34 M5 IO_L6N_T0_VREF_34 N4 IO_L7P_T1_34 R2 IO_L7N_T1_34 R1 IO_L8P_T1_34 R3 IO_L8N_T1_34 T2 IO_L9P_T1_DQS_34 T4 IO_L9N_T1_DQS_34 T3 IO_L10P_T1_34 P5 C IO_0_35 E6 IO_L1P_T0_AD4P_35 B7 IO_L1N_T0_AD4N_35 A7 IO_L2P_T0_AD12P_35 B6 IO_L2N_T0_AD12N_35 B5 IO_L3P_T0_DQS_AD5P_35 A5 IO_L3N_T0_DQS_AD5N_35 A4 IO_L4P_T0_35 B4 IO_L4N_T0_35 A3 IO_L5P_T0_AD13P_35 C7 IO_L5N_T0_AD13N_35 C6 IO_L6P_T0_35 D6 IO_L6N_T0_VREF_35 D5 IO_L7P_T1_AD6P_35 C3 IO_L7N_T1_AD6N_35 C2 IO_L8P_T1_AD14P_35 B2 IO_L8N_T1_AD14N_35 A2 IO_L9P_T1_DQS_AD7P_35 C1 IO_L9N_T1_DQS_AD7N_35 B1 IO_L10P_T1_AD15P_35 E2 IO_L10N_T1_AD15N_35 D1 IO_L11P_T1_SRCC_35 E3 IO_L11N_T1_SRCC_35 D3 IO_L12P_T1_MRCC_35 D4 IO_L12N_T1_MRCC_35 C4 IO_L13P_T2_MRCC_35 F5 IO_L13N_T2_MRCC_35 E5 IO_L14P_T2_SRCC_35 F4 IO_L14N_T2_SRCC_35 F3 IO_L15P_T2_DQS_35 F2 IO_L15N_T2_DQS_35 E1 IO_L16P_T2_35 G5 IO_L16N_T2_35 G4 IO_L17P_T2_35 G2 IO_L17N_T2_35 G1 IO_L18P_T2_35 H5 IO_L18N_T2_35 H4 IO_L19P_T3_35 J5 IO_L19N_T3_VREF_35 J4 IO_L20P_T3_35 H2 IO_L20N_T3_35 H1 IO_L21P_T3_DQS_35 J3 IO_L21N_T3_DQS_35 H3 IO_L22P_T3_35 K1 IO_L22N_T3_35 J1 IO_L23P_T3_35 L3 IO_L23N_T3_35 L2 IO_L24P_T3_35 K3 IO_L24N_T3_35 K2 IO_25_35 K5 D CCLK_0 E8 DONE_0 H10 PROGRAM_B_0 L9 M0_0 M9 M1_0 M10 M2_0 M11 TDI_0 N7 TDO_0 N8 TCK_0 L7 TMS_0 M7 INIT_B_0 K10 DXP_0 K8 DXN_0 K7 CFGBVS_0 E7 VP_0 H8 VN_0 J7 VREFP_0 J8 VREFN_0 H7 E VCCINT F7 VCCINT F9 VCCINT G6 VCCINT H9 VCCINT J6 VCCINT K9 VCCINT L8 VCCAUX G10 VCCAUX J10 VCCAUX K11 VCCAUX L10 VCCBRAM E10 VCCBRAM F11 VCCADC_0 G8 VCCBATT_0 F8 VCCO_0 L6 VCCO_14 L16 VCCO_14 M13 VCCO_14 N10 VCCO_14 P7 VCCO_14 R14 VCCO_14 T11 VCCO_15 A16 VCCO_15 B13 VCCO_15 C10 VCCO_15 E14 VCCO_15 H15 VCCO_15 J12 VCCO_34 M3 VCCO_34 R4 VCCO_34 T1 VCCO_35 A6 VCCO_35 B3 VCCO_35 D7 VCCO_35 E4 VCCO_35 F1 VCCO_35 J2 F GND A1 GND A11 GND B8 GND C5 GND C15 GND D2 GND D12 GND E9 GND F6 GND F10 GND F16 GND G3 GND G9 GND G13 GND H6 GNDADC_0 G7 GND J9 GND J11 GND K4 GND K6 GND K14 GND L1 GND L11 GND M8 GND N5 GND N15 GND P2 GND P12 GND R9 GND T6 GND T16 G
Specifications
Manufacturer XILINX Family CERN Logic MPN pattern XC7A50T-1FTG256C Pins 256 Mounting SMD
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Datasheet
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Source library file (provenance)
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Affiliate link · Part license: CERN-OHL-P-2.0
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Machine-readable data for this part: /api/v1/parts/cern_xc7a50t_1ftg256c.json (absolute download URLs).
MCP: https://mcp.partreel.com/mcp → get_part("cern_xc7a50t_1ftg256c"). See /llms.txt · agent guide